Aspects of the invention relate generally to the field of data processing. More particularly, various aspects of the invention relate to static random-access memory (SRAM) circuitry and read and write functions thereon.
Semiconductor memory devices retain data bits in memory and are useful in the fields of industrial and scientific subsystems. Compared with dynamic RAM devices (DRAM), containing at least a capacitor and a transistor, conventional SRAM device structure includes a six-transistor (6-T) cell having six metal-oxide-semiconductors-field-effect-transistors (MOSFETs). Wherein DRAM devices must be periodically refreshed, SRAM devices exhibit data remanence, where data is retained as long as power is being supplied.
Conventional 6-T SRAM devices store bits on four transistors that form two cross-coupled inverters. Storage cells have two stable states, denoted by a 0 and 1. Two access transistors coupled with each of the inverters serve to control access to a storage cell during read and write functions. Typically, a word line enables access to the cell. The word line controls the two access transistors, which in turn, control the connection to a bit line. Furthermore, SRAM cells have three different states: hold (the circuit is idle), read (data has been requested), and write (updating the contents of the cell).
While conventional SRAM devices provide benefits over DRAM devices, namely static memory and improved speed, conventional SRAM devices still face many challenges. The traditional 6-T SRAM cell faces limitations in read disturb, write margins, leakage, process variation, area, and half selection. For instance, a potential difference between the bit line and a storage cell during read functions can increase the threshold voltage (Vth) of the storage cell and flip the value in the storage cell. In another example, read functions on 6-T SRAM cells can cause nearby cells in the same memory block to change over time (known as a read disturb). If reading continually from the same cell, that cell will not fail, but other surrounding cells on subsequent reads will fail.